Mondrian memory protection
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Summary and Notes
Existing approach:
- Each process has a separate linear demand-paged virtual address space
- The separate linear address spaces implicitly defines the single protection domain
- Granularity of sharing is one page; sharing requires context-switch
Comments
Using MMP with softvm:
A software-managed protection and address translation mechanism could implement MMP. Protection domains are independent of virtual or physical address spaces. A virtually indexed cache hierarchy used in softvm could implement cache protection table entries. A cache miss could invoke a software-driven handler to translate the address and bring it to the cache.
Trace-driven simulation:
The trace driven simulation used by the authors to evaluate their proposal measures: the required space and referencing overheads; the PLB; and the sidecar-register behavior. This model/simulator can just be a simple parser of the trace file with a state machine to produce quick evaluations of the overheads. An implementation of these features of MMP on a CPU simulator should include: adding support for all the registers and PLB; adding the permission table storage for every segment; walking/translating for every memory reference by a process; and protecting domain context.